1. Field of the Disclosure
The present disclosure relates to electronic devices, and more particularly to electronic devices that include magneto-resistive memory devices and processes for forming them.
2. Description of the Related Art
Magneto-resistive random access memory (“MRAM”) cells operate by measuring the current passing through a magnetic tunnel junction including a tunnel barrier layer lying between a fixed magnetic layer and a free magnetic layer. The fixed magnetic layer has its magnetization pinned in a particular orientation or direction, and the free magnetic layer has its magnetization in either the same or a different orientation as compared to the fixed magnetic layer. The effective resistance of the magnetic tunnel junction is different depending on whether the magnetizations of the free layer and the fixed layer are aligned or not. Thus, the MRAM cell can be programmed by setting the magnetization of the free layer in a desired direction.
In a spin-transfer MRAM (STMRAM) cell, the magnetization of the free layer can be programmed by passing a large amount of current through the magnetic tunnel junction relative to the current used during a read operation. Catastrophic breakdown of the tunnel junction layer becomes likely as the lower end of the breakdown voltage distribution extends into the upper end of the write voltage distribution within a STMRAM memory array. Significant separation between these two distributions is required for reliable STMRAM operation. Changes in materials and device characteristics during processing can reduce the separation, or increase the overlap between these voltage distributions, making such events more likely.
In particular, the tunnel current required to cause a switching event is dependent upon the magnetic volume of the free layer, while the voltage that must be sustained across the tunnel barrier layer during a switching event is dependent upon the tunnel barrier active area. If the tunnel barrier area is smaller than the magnetic area, the STMRAM operation will be adversely impacted. Such a difference can arise during high temperature processing steps when an ultra-thin or under-oxidized metal oxide is exposed to an adjacent insulating layer. Under-oxidized tunnel barriers having low resistance area product (RA) are common in STMRAM since the switching voltage Vsw∝RA. Oxygen (or nitrogen) may diffuse from the insulating layer into the edges of the tunnel barrier layer, locally increasing its RA product and reducing the available active area for electron tunneling. Hence, the required tunnel current for switching must pass through a reduced area, causing an increase in Vsw for the same average breakdown voltage Vbd.
Accordingly, it is desirable to provide an STMRAM device structure having a tunnel barrier whose active area is not significantly decreased due to subsequent processing. It is also desirable to provide a method for fabricating an STMRAM device that has an active area that is not significantly reduced due to subsequent processing.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the invention. The use of the same reference symbols in different drawings indicates similar or identical items.